void Init_WDT(void)

{

      int
n=0;

     *pWDTUNLOCK =
0xAD21AD21;               // Before writing to the WDT configuration space,
UNLOCK WDT by writing the command value 0xAD21AD21

     *pWDTCLKSEL =
WDT_CLK_SRC_CER_RESO;     // Selects an external clock
(0x0000000)

     *pWDTTRIP =
0x7;                         // number of times that the WDT can expire before
/WDTRSTO pin is continually asserted until the next time hardware reset
is                                   applied

     *pWDTCNT =
0x3FFFFF;                    // 32-bit unsigned count value - 2MHz external
clock ---> T=500ns

     // 0x3FFFFF =
(d)4194303

      // 500ns *
4194303 = 2.09 sec

      // Wait
before enable Watchdog timer

     // WDT effect latency - 2.5 WDTCLK cycles at 2
MHz

     for(n = 0; n
< 50000; n++ )          //**** Was 500

      
{

      
asm("nop;");

      
}

     *pWDTCTL =
WDT_EN;                         // Enable the Watchdog timer

      *pWDTUNLOCK
= 0;                         // After configuring the WDT registers, the core
needs to LOCK it again by writing any value other than the command
value

}