#include <cdefBF518.h>
#include <ccblkfn.h>
#include <sys\exception.h>
EX_INTERRUPT_HANDLER(FlagA_ISR);
void Set_PLL(unsigned int pmsel,unsigned int pssel)
{
unsigned int new_PLL_CTL;
*pPLL_DIV = pssel;
asm("ssync;");
new_PLL_CTL = (pmsel & 0x3f) << 9;
*pSIC_IWR |= 0xffffffff;
if (new_PLL_CTL != *pPLL_CTL)
{
*pPLL_CTL = new_PLL_CTL;
asm("ssync;");
asm("idle;");
}
}
void Init_EBIU(void)
{
*pEBIU_AMBCTL0 = 0x7bb07bb0;
*pEBIU_AMBCTL1 = 0xffc07bb0;
*pEBIU_AMGCTL = 0x000f;
}
void Init_SDRAM(void)
{
*pEBIU_SDRRC = 0x00000817;
*pEBIU_SDBCTL = 0x00000025;
*pEBIU_SDGCTL = 0x0091998d;
ssync();
}
void InitPorts(void)
{
*pPORTF_FER &= ~(PF1|PF0);
*pPORTFIO_DIR &= ~(PF1|PF0);
*pPORTFIO_INEN |= (PF1|PF0);
*pPORTFIO_EDGE |= (PF1|PF0) ;
*pPORTFIO_POLAR |= (PF1|PF0);
*pPORTFIO_MASKA_SET |= (PF1|PF0);
}
void Init_Interrupts(void)
{
int iar5 ;
int imask1;
iar5 = *pSIC_IAR5;
iar5 &= 0xff0fffff;
iar5 |= 0x00600000;
*pSIC_IAR5 = iar5;
register_handler(ik_ivg13, FlagA_ISR);
*pSIC_IMASK1 |= 0x00002000;
}
EX_INTERRUPT_HANDLER(FlagA_ISR)
{
if((*pPORTFIO&PF0) == PF0)
{
printf("interrupt is PF0!\n");
}
else if((*pPORTFIO&PF1) == PF1)
{
printf("interrupt is PF1!\n");
}
*pPORTFIO_CLEAR = PF1|PF0;
}
void main(void)
{
Set_PLL(16,4);
Init_EBIU();
Init_SDRAM();
InitPorts();
Init_Interrupts();
while(1);
}
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2013/11/22 10:35:25
