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在CCES环境下如何使用21489的IIR加速器
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在CCES环境下如何使用21489的IIR加速器
问:

在VDSP++的环境下程序已经实现,但是到了CCES下,把中断初始化函数修改了,还是无法正确配置中断,直接返回IIR的中断初始化失败,请问CCES下怎么使用IIR加速器?

代码如下:


/* This code has the TCBS, initialization routines, and the DMA completion ISR for the IIR accelerator */  

    

#include <services\int\adi_int.h>  

#include "ADDS_21489_EzKit.h"  

#include "IIR_Accelerator.h"  

  

void Init_IIR(void);  

void ACC_ISR();  

  

float input_left[NUM_SAMPLES];  

float input_right[NUM_SAMPLES];  

float output_left[NUM_SAMPLES];  

float output_right[NUM_SAMPLES];  

float coeffs_low_pass[7*NUM_SECTIONS+1] = {  

                                                                                                                                                      #include "lowpass_200Hz.dat"  

                                                                                                       } ;  

  

float coeffs_high_pass[];  

  

volatile int acc_over;  

ad1939_float_data fBlockA;  

  

// TCB Initialization  

int IIR_TCB_RIGHT[13]={  

                                        0,                                                  // CP                     = Chain pointer register  

                                        21,                                                  // CC/CL           = Coefficient buffer length register  

                                        1,                                                  // CM                      = Coefficient modifier register  

                                        (int)coeffs_low_pass,          // CI              = Cofficient index refister  

                                        (int)fBlockA.Tx_R1,                    // OB              = Ouput data base register  

                                        NUM_SAMPLES,                                        // OL/OC            = Output buffer length register  

                                        1,                                                  // OM                     = Output modifier register  

                                        (int)fBlockA.Tx_R1,                    // OI                      = Output data index register  

                                        (int)fBlockA.Rx_R1,                    // IB                     = Input data base register  

                                        NUM_SAMPLES,                                        // IL/IC             = Input buffer length register  

                                        1,                                                  // IM                     = Input buffer modifier register  

                                        (int)fBlockA.Rx_R1,                    // II                     = Input data index register  

                                        2|(383<<14)                              // IIRCTL2           = Channel control register, no of biquads = 3, WINDOW SIZE=512  

                              };  

    



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int IIR_TCB_LEFT[13]={  

                                        (int)IIR_TCB_RIGHT+12,          // CP                     = Chain pointer register  

                                        21,                                                  // CC/CL           = Coefficient buffer length register  

                                        1,                                                  // CM                      = Coefficient modifier register  

                                        (int)coeffs_low_pass,          // CI              = Cofficient index refister  

                                        (int)fBlockA.Tx_L1,                    // OB              = Ouput data base register  

                                        NUM_SAMPLES,                                        // OL/OC            = Output buffer length register  

                                        1,                                                  // OM                     = Output modifier register  

                                        (int)fBlockA.Tx_L1,                    // OI                      = Output data index register  

                                        (int)fBlockA.Rx_L1,                              // IB                     = Input data base register  

                                        NUM_SAMPLES,                                        // IL/IC             = Input buffer length register  

                                        1,                                                  // IM                     = Input buffer modifier register  

                                        (int)fBlockA.Rx_L1,                              // II                     = Input data index register  

                                        2|(383<<14)                              // IIRCTL2           = Channel control register, no of biquads = 3, WINDOW SIZE=512  

                              };  

  

/* Adding the Initialization Code for IIR Accelerator Now */  

    

void Init_IIR(void)  

{  

          int temp;  

  

          IIR_TCB_RIGHT[0]=(int)IIR_TCB_LEFT+12;  

  

          //Mapping the IIR DMA interrupt  

          temp=*pPICR0;  

          temp&=~(P0I0|P0I1|P0I2|P0I3|P0I4);  

          temp|=P0I0|P0I1|P0I3|P0I4;  

          *pPICR0=temp;  

  

          adi_int_InstallHandler(ADI_CID_P0I,(ADI_INT_HANDLER_PTR)ACC_ISR, _NULL ,true);  

  

          //Selecting the IIR Accelerator  

          temp=*pPMCTL1;  

          temp&=~(BIT_17|BIT_18);  

          temp|=IIRACCSEL;  

          *pPMCTL1=temp;  

  

          asm("nop;nop;nop;nop;");  

  

          //Initializing the chain pointer register  

          *pCPIIR=(int)IIR_TCB_LEFT+12-0x80000;  

  

         //Now Enabling the IIR Accelerator  

          *pIIRCTL1=IIR_EN|IIR_DMAEN|IIR_CH2|IIR_RND0;  

  

}  

  

void Process_block(float* input_left,float* input_right, float* output_left, float* output_right, bool first_flag)  

{  

          int i;  

  

          //Start the accelerator for first time  

          if(first_flag)  

          {  

                    Init_IIR();  

          }  

  

          /*Move the accelerator from IDLE state to the Data Load state by resetting and clearing  

          the IIR_DMAEN bit*/  

          else  

          {  

                    *pIIRCTL1&=~IIR_DMAEN;  

                    *pIIRCTL1|=IIR_DMAEN;  

          }  

  

          /* Wait till IIR accelerator finishes the processing */  

          while(acc_over==0);  

          acc_over=0;  

  

          /*Multiply the output with filter gain */  

          for (i =0; i < NUM_SAMPLES; ++i)  

          {  

                    output_left[i]=output_left[i]*coeffs_low_pass[21];  

                    output_right[i]=output_right[i]*coeffs_low_pass[21];  

  

          }  

}  


void ACC_ISR()  

{  

          acc_over=1;  

}  


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答:


你的工程里面的IIR的配置是没有问题的。我把你的代码改称

void main()

{

     adi_initComponents();    

initPLL_SDRAM(); //Initialize the PLL and SDRAM controller

Init_IIR();

while(1)

;

}

是可以进IIR中断的。

我的建议是你把你系统的每个模块都单独测试一下,理清你的系统的数据流,然后再逐步把每个模块加进去。


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