#include <cdefBF518.h>	
#include <ccblkfn.h>
#include <sys\exception.h>
#include "stdio.h"
 

#define  PLL_Control_0          0x0000
#define  PLL_Control_1          0x0100
#define  DAC_Control_0          0x0200
#define  DAC_Control_1          0x0300
#define  DAC_Control_2          0x0400
#define  DAC_Channel_mute       0x0500
#define  DAC_1L_volume_control  0x0600
#define  DAC_1R_volume_control  0x0700
#define  DAC_2L_volume_control  0x0800
#define  DAC_2R_volume_control  0x0900
#define  DAC_3L_volume_control  0x0a00
#define  DAC_3R_volume_control  0x0b00
#define  DAC_4L_volume_control  0x0c00
#define  DAC_4R_volume_control  0x0d00
#define  Auxiliary_TDM_control_0  0x0f00
#define  Auxiliary_TDM_control_1  0x1000

#define CODEC_1934_REGS_LENGTH	16

#define TIMODE_0 0x0000
#define TIMODE_1 0x0001
#define TIMODE_2 0x0002
#define TIMODE_3 0x0003

void Set_PLL(int pmsel,int pssel)
{
	int new_PLL_CTL;	
	*pPLL_DIV = pssel;
	asm("ssync;");
	new_PLL_CTL = (pmsel & 0x3f) << 9;		
	*pSIC_IWR |= 0xffffffff;
	if (new_PLL_CTL != *pPLL_CTL) 
	{
		*pPLL_CTL = new_PLL_CTL;
		asm("ssync;");
		asm("idle;");
	}
} 

void Init_EBIU(void)
{
	*pEBIU_AMBCTL0	= 0x7bb07bb0;
	*pEBIU_AMBCTL1	= 0xffc07bb0;
	*pEBIU_AMGCTL	= 0x000f;
}

void Init_SDRAM(void)
{
	*pEBIU_SDRRC = 0x00000817;	
	*pEBIU_SDBCTL = 0x00000025;
	*pEBIU_SDGCTL = 0x0091998d;	
	ssync();												
}


void ad1934_spi(void)
{
	
#define Address 0x05   //0000_1000
#define Data 0x0322
int i;
	
    *pSPI0_CTL |= SPE;     //Enable SPI
    
    *pPORTGIO &= ~PG0;			//PG0õ
	for (i=0; i<0x9; i++) asm("nop;");  
	
    
    *pSPI0_TDBR = Address;     //Start transfer of 1st byte
     while(*pSPI0_STAT & TXS);
     while(!(*pSPI0_STAT & SPIF));     //Wait till 8 bit transfer complete

    *pSPI0_TDBR = (Data >> 8) & 0xFF;     //Start transfer of 2nd byte
     while(*pSPI0_STAT & TXS);
     while(!(*pSPI0_STAT & SPIF));     //Wait till 8 bit transfer complete

    *pSPI0_TDBR = Data & 0xFF;     //Start transfer of 3rd byte
     while(*pSPI0_STAT & TXS);
     while(!(*pSPI0_STAT & SPIF));     //Wait till 8 bit transfer complete

    *pPORTGIO |= PG0;    		//PG0ø
    *pSPI0_CTL &= ~SPE;     //disable SPI
	for (i=0; i<0x0f0; i++) asm("nop;");  
}

 
int main( void )
{
	
   
   Set_PLL(16,4);
   Init_SDRAM();
   Init_EBIU();
 	
 	*pPORTG_FER	&= ~PG0;
	ssync();
	*pPORTGIO_DIR |= PG0;	//PG0Ϊ
	
	*pPORTG_FER = PG12|PG13|PG14;	
	*pPORTG_MUX = 0x0;
	
	*pSPI0_BAUD = 50;     //Sclk/(2*25) MHz
    *pSPI0_CTL = MSTR | TIMODE_1; 
 	
    int j;
    while(1)
    {
      for(j=0;j<CODEC_1934_REGS_LENGTH;j++)
      {
        ad1934_spi();	
      }
    }

}
